Click here to return to the VHDL Reference Guide. (last edit: 24. september 2012)

Enumeration

A data type defined by listing the values it can take. Each value is either a name or a character. A character is one printable character enclosed in single quotes.

Syntax

  type NewName is (EnumLiteral, ...);

  EnumLiteral = {either}
  Identifier
  '{One printable character}'
    

Where

See Declaration

Rules

The same value cannot appear twice in the same type, but may appear in two different enumeration types. This is called overloading.

Things to remember

Characters are case sensitive, e.g. 'x' is not the same as 'X' Don't use attributes of enumeration types with synthesis, in case the encoding is changed during optimization.

Synthesis

A user defined enumeration type of N values synthesizes to a bus of log N 2 bits. The 1st value becomes binary 0, the 2nd binary 1, the third binary 10 and so on. Finite state machine optimization changes the encoding.

Example

  type STD_ULOGIC is
      ('U', 'X', '0', '1', 'Z', 'W', 'L', 'H', '-');
  type Opcode is (Idle, Start, Stop, Clear);
    

See Also

Type, Standard, Attribute Name